This invention relates to a method of etching a feature in a substrate, with particular, but by no means exclusive, reference to the etching of one or more features in a semiconductor substrate such as a silicon substrate.
The etching of features in silicon is a ubiquitous aspect of semiconductor device fabrication. However, etched features in silicon can be difficult to line or fill using subsequent CVD and PVD processes unless the side walls of the etched features have a positive taper and there is a low undercut of the mask. The control of these aspects of the etch is often done at the expense of the etch rate. However, it is evident that a high throughput is necessary if a process is to be production worthy. A particular problem is encountered with the commonly used cyclic etch and deposition technique, in which an etch step is performed which is followed by a deposition step. The process is cyclic, i.e., a number of cycles are employed, in which each cycle includes an etch step and an associated deposition step. The seminal process of this general type is commonly described as the Bosch process. The Bosch process is described in U.S. Pat. No. 5,501,893, the entire contents of which are herein incorporated by reference. The deposition step typically deposits a passivation material such as a polymer onto the sidewalls of the etched feature. Variants on the Bosch process are known, including variants in which each cycle includes a further step additional to the etch and deposition steps. The features etched using the Bosch process and its variants often produce a substantial undercut, which for the reasons described above give rise to processing problems. FIG. 1 is an SEM micrograph showing an example of the relatively large undercutting observed after a conventional Bosch process in which a feature is etched in silicon through a lithographically produced aperture in a mask. These problems exist with the formation of high aspect ratio trenches, the formation of vias, and in other applications. Although these problems are not limited to any particular feature size, they are particularly apparent at the micron and sub-micron level. US2006/0134917 and U.S. Pat. No. 7,250,371 disclose methods for forming etched features of low critical dimension (CD) in which a mask is deposited and a conformal deposition layer is deposited on the side walls of openings in the mask. However, these documents do not address the problems discussed above.